Method and apparatus for tracking clock sources

ABSTRACT

A method and an apparatus for tracking a clock source are disclosed. The method includes determining a best clock source to be tracked by a device according to a best clock source tracked by a slave candidate port in the device and distributing the best clock source tracked by the device through a master candidate port in a master state. Through the embodiments of the present disclosure, the clock source selection of the device converges quickly. Moreover, because the slave candidate port is determined according to the network planning, the planning of the transport network is observed.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of International Application No.PCT/CN2008/072454, filed on Sep. 23, 2008, which claims priority toChinese Patent Application No. 200710154688.9, filed on Sep. 25, 2007,both of which are hereby incorporated by reference in their entireties.

FIELD OF THE DISCLOSURE

The present disclosure relates to the communication field, and inparticular, to a technology for tracking clock sources.

BACKGROUND

The packet switched transport network is widely applied in the telecomtransport network. A packet switched network is based on packetexchanging. The packet transport device on the network is asynchronous,but network applications impose requirements on clock synchronizationand precise time synchronization. For example, the 3^(rd) Generation (3G) transport network needs to transmit information of precise time andclocks. The Institute of Electrical and Electronics Engineers (IEEE)1588 Standard provides a basis for clock synchronization and timesynchronization of the packet switched network.

In the existing IEEE 1588 Standard, the Best Master Clock (BMC)selection method includes using the BMC clock source comparisonalgorithm to select the source, using the BMC port state determiningalgorithm to select the source, and using the BMC port state machine toselect the source.

The BMC source selection method involves the following aspects describedbelow.

Each port of the device receives different announce packets, and the BMCclock source comparison algorithm is run according to the clock sourceinformation (including the clock source quality level, serial number ofthe clock source, and topology structure of network transmission)carried in the announce packet to select the best clock source for eachport (Erbest).

The device runs the BMC clock source comparison algorithm againaccording to the Erbest of each port and selects the best clock sourcefor the whole device (Ebest).

The device runs the BMC port state determining algorithm according tothe local clock (D0), the best clock source (Erbest) for each port, andthe best clock source (Ebest) for the whole device, and determines thetype of each port: BMC_slave (clock source port), BMC_master (port fordistributing clocks), or BMC_passive (port neither for distributing norfor tracking clocks).

Each port runs the BMC port state machine and determines the state ofthe port according to the current state of the port and the BMC event.The states of the port include initializing, listening, faulty,disabled, pre_master, master, uncalibrated, slave, and passive states.

After the port in the master state receives a “slave” message, the statechanges to “uncalibrated”, and the time count begins. After the timecount reaches the set time; the state changes to “slave”. After the portin the “slave” state receives a “master” message, the state changes to“pre_master”, and the time count begins. After the time count reachesthe set time, the state changes to “master.”

After the foregoing BMC source selection method is applied, the IEEE1588 clock network as shown in FIG. 1 is formed. It can be seen that,the whole clock network is of a tree structure. Each Boundary Clock (BC)ultimately succeeds in tracking the grandmaster clock.

In actual applications of the transport network, typically the maximumnumber of boards connectible to a network element is greater than ten,and multiple ports exist on each board. Each port has multiple (e.g.,five) optional clock sources. If all the announce packets arriving ateach port participate in the source selection according to the BMCalgorithm, the source selection is performed based on hundreds of clocksources. Moreover, the actual networking is miscellaneous, and thecorresponding clock network is rather complicated. Upon initialoperation of the network and after the network changes, the clocknetwork oscillates sharply and the convergence of clock source selectiontends to be slow.

For example, in the clock network architecture of the transport networkarchitecture shown in FIG. 2, the convergence-layer device BC-1 has fourports: port 1, port 2, port 3, and port 4. In the source selection basedon the existing BMC algorithm, the source selection process mayexperience the problems described below.

First, port 4 sends an access-layer clock source whose clock stratum ishigher than the clock stratum of the local clock, and the device BC-1tracks the clock source sent by port 4 according to the BMC algorithm.

Afterward, port 2 sends a clock source of a grandmaster clock of aPrimary Reference Clock (PRC), and the device BC-1 switches over to thetrack source of port 2.

Afterward, port 3 sends the access-layer track source and introduces thegrandmaster clock source of the PRC. However, the number of BC devicesin the path of the track source is less than the number of BC devices inthe path of the clock source introduced by port 2. According to the BMCalgorithm, the device BC-1 switches over to the track source sent byport 3.

Finally, port 1 sends a track source and also introduces the grandmasterclock source of the PRC. However, the number of BC devices in the pathof the track source is less than the number of BC devices in the pathfrom the grandmaster clock source introduced by port 3 to the deviceBC-1. According to the BMC algorithm, the device BC-1 switches over tothe track source sent by port 1.

Therefore, the track source of the device BC-1 is switched over threetimes: switchover from the track source of port 4 to the track source ofport 2, switchover from the track source of port 2 to the track sourceof port 3, and switchover from the track source of port 3 to the tracksource of port 1. The clock oscillates sharply, and the convergence ofthe clock source selection is slow.

Moreover, transport networks generally include access-layer networks andconvergence-layer networks. In the planning of a network, a master clocksource and a slave clock source are generally configured for theconvergence-layer network. Certain ports in the device are configured asfollows: the port for receiving only the clock source packet from theaccess layer is configured as a port for distributing clocks out insteadof a port for participating in the source selection, and the port forreceiving the clock source packet from the convergence layer isconfigured as a port for participating in the source selection.

However, according to the BMC source selection method in the prior art,the packets received by all ports of the device participate in thesource selection which is not consistent with the network planning. Forexample, in the clock networking architecture of another transportnetwork shown in FIG. 3 according to the planning, a master clock sourceand a slave clock source are configured for the convergence-layernetwork. Therefore, only two ports need to be configured for the deviceBC-1 in the convergence-layer network to participate in the sourceselection. However, if the BMC source selection method is applied, thepackets received by all ports of the device BC-1 participate in thesource selection, for example, two types of packets received by port 1and port 2 from the convergence layer, and eight types of packetsreceived by port 3 and port 4 from the access layer. That is, the deviceBC-1 needs to select a source according to ten types of packets, whichis not consistent with the network planning and tends to cause slowconvergence of the clock source selection and result in a waste ofresources. Another consequence is that the convergence-layer devicetends to track the clock of the access-layer device which is notconsistent with the network planning.

SUMMARY

The embodiments of the present disclosure provide a method and anapparatus for tracking a clock source so that the clock source selectionof the device converges quickly.

A method for tracking a clock source in an embodiment of the presentdisclosure includes determining a best clock source that needs to betracked by a device according to a best clock source tracked by a slavecandidate port in the device and distributing the best clock sourcetracked by the device through a master candidate port in a master stateof operation.

An apparatus for tracking a clock source in an embodiment of the presentdisclosure includes a clock source selecting unit configured todetermine a best clock source that needs to be tracked by a deviceaccording to a best clock source tracked by a slave candidate port inthe device and a transmitting unit configured to distribute the bestclock source tracked by the device through a master candidate port in amaster state.

In the technical solution under the present disclosure, the best clocksource that needs to be tracked by the device is determined according tothe clock source tracked by the slave candidate port in the device, andtherefore, the clock source selection of the device converges quickly.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows IEEE 1588 clock networking in the prior art;

FIG. 2 shows a clock networking architecture of a transport network inthe prior art;

FIG. 3 shows a clock networking architecture of another transportnetwork in the prior art;

FIG. 4 is a flowchart of a first embodiment of the present disclosure;

FIG. 5 shows a structure of a second embodiment of the presentdisclosure;

FIG. 6 shows a clock networking architecture obtained through anembodiment of the present disclosure; and

FIG. 7 shows another clock networking architecture obtained through anembodiment of the present disclosure.

DETAILED DESCRIPTION OF THE EMBODIMENTS

The first embodiment of the present disclosure provides a method fortracking a clock source. In this method, the ports of all boards on thedevice are categorized into slave candidate ports and master candidateports, and the clock source is selected according to only the clocksource carried in the announce packet received by the slave candidateport to obtain the best track source of the device.

Before the first embodiment of the present disclosure is implemented,the ports of the device are categorized into slave candidate ports andmaster candidate ports according to the clock network planning.

Given below are examples of the clock network planning as a basis fordetermining the port type in the transport network:

(1) Planning for the clock network topology of the transport network.

For example, for transport networks which generally includeconvergence-layer networks and access-layer networks, the planning ofthe clock network topology of a transport network expects the device inthe access-layer network to track the clock source of the device in theconvergence-layer network. Therefore, at a time of determining the typeof the port, the port capable of only receiving the clock sourceinformation from the access-layer device is sorted as a master candidateport for distributing clocks. The port capable of receiving the clocksource information from the convergence-layer device is sorted as aslave candidate port for participating in clock source selection or issorted as a master candidate port for distributing clocks.

(2) Planning of the master clock source and the slave clock source inthe convergence-layer network.

For example, for a transport network, a master clock source, and a slaveclock source are sometimes planned in the convergence-layer network.Normally, the master clock source works to transmit packets between thedevices in the transport network. When the master clock source fails,the slave clock source works to transmit packets between the devices inthe transport network. Therefore, in this planning, the categorizationof the ports needs to consider not only the port capable of receivingmaster clock source, but also the port capable of receiving the slaveclock source. In this embodiment, the ports capable of receiving themaster clock source or the ports capable of receiving the slave clocksource are sorted as slave candidate ports for participating in theclock source selection, and also are sorted as master candidate portsfor distributing clocks.

Table 1 gives an instance of categorizing ports.

TABLE 1 Slave candidate port Master candidate port Port 1 Port 2 Port 2Port 3 Port 4 Port 5

As shown in FIG. 4, the process of implementing the first embodiment ofthe present disclosure includes the following steps:

Step S101: Determine the best clock source (Erbest) sent from each slavecandidate port according to the clock source information carried in theannounce packets received by all slave candidate ports by using the BMCcomparative source selection method.

Step S102: Run the BMC comparative source selection algorithm accordingto the best clock source (Erbest) of each slave candidate port and usethe best clock source (Erbest) characterized by the best quality and theshortest path to the device as the best track source (Ebest) of thedevice.

In step S102, the selection of the best track source of the device isbased on the best clock source (Erbest) of the slave candidate port onlyand is no longer based on the best clock source (Erbest) of the mastercandidate port. Therefore, fewer ports participate in selecting the besttrack source (Ebest), and the clock source selection of the deviceconverges quickly.

Afterward, the best clock source (Ebest) selected for the device isdistributed through the master candidate port in a BMC_master state asdetailed below.

Step S103: Run the BMC port state determining algorithm according to thetype of each port of the device, the local clock D0, the best tracksource (Ebest) of the device, and the best clock source (Erbest) of eachslave candidate port of the device and determine the current state ofeach port of the device as either a BMC_slave, a BMC_master, or aBMC_passive state.

A judgment is made about whether the stratum of the local clock (D0) ofthe device falls within 1-127. If the stratum of the local clock (D0) ofthe device falls within 1-127, the local clock (D0) needs to bedistributed, and a further comparison needs to be made between the localclock (D0) and the best clock source (Erbest) of each port of thedevice.

1. If the quality level of the local clock (D0) of the device is higherthan the quality level of the best clock source (Erbest) of the port andthe port is sorted as a master candidate port (or as a master candidateport and a slave candidate port concurrently), the state of the port isdetermined as (i.e., to be) BMC_master.

2. If the quality level of the local clock (D0) of the device is higherthan the quality level of the best clock source (Erbest) of the port,but the port is sorted as only a slave candidate port, the state of theport is determined as (i.e., to be) BMC_passive.

3. If the quality level of the local clock (D0) of the device is lowerthan the quality level of the best clock source (Erbest) of the port,the state of the port is determined to be the BMC_passive.

If the quality level of the local clock (D0) of the device falls outside1-127, a comparison is made between the quality level of the local clock(D0) and the quality level of the best track source (Ebest) of thedevice:

1. If the quality level of the best track source (Ebest) of the deviceis higher than the quality level of the local clock (D0), the port ofthe best track source (Ebest) of the device is determined to be aBMC_slave port.

For other ports in the device:

If the port is sorted as a master candidate port (or as a mastercandidate port and a slave candidate port concurrently), and the qualitylevel of the best track source of the port (Erbest) is lower than thequality level of the best track source of the device (Ebest), the stateof the port is determined to be BMC_master. If the port is sorted as amaster candidate port (or as a master candidate port and a slavecandidate port concurrently), and the quality level of the best clocksource (Erbest) of the port is equal to the quality level of the besttrack source (Ebest) of the device but the network topology of the bestclock source (Erbest) of the port is worse than the network topology ofthe BMC clock source (Ebest) of the device, the state of the port isdetermined to be BMC_passive. If the port is sorted as a slave candidateport, the state of the port is determined to be BMC_passive.

2. If the quality level of the local clock (D0) of the device is higherthan the quality level of the best track source (Ebest) of the device,the port needs to distribute the local clock (D0) to other devices. Inthis case, the state of each port of the device is determined accordingto the type of the port.

If the device port is sorted as a master candidate port (or as a mastercandidate port and a slave candidate port concurrently), and the qualitylevel of the best clock source (Erbest) of the port is lower than thequality level of the local clock (D0), the state of the port isdetermined to be BMC_master. If the device port is sorted as a mastercandidate port (or as a master candidate port and a slave candidate portconcurrently), and the quality level of the best clock source (Erbest)of the port is equal to the quality level of the local clock (D0) of thedevice but the network topology of the best clock source (Erbest) of theport is worse than the network topology of the local clock (D0) of thedevice, the state of the port is determined to be BMC_passive. If thedevice port is sorted as a slave candidate port, the state of the portis determined to be BMC_passive.

Step S104: Run the BMC port state machine at each port according to thecurrent state of each port of the device and the event that triggerschange of the state. When the port of the device is in the BMC_masterstate, send out the selected best track source (Ebest) of the devicethrough the port.

In the process of running the BMC port state machine, after the port inthe BMC_master state receives a “passive” message and/or a “slave”message, the state changes to “uncalibrated”, and the time count begins.When the time count reaches the set time, the state changes from“uncalibrated” to “slave”. After the port in the BMC_slave statereceives a “master” message and/or a “passive” message, the statechanges to “pre_master”, and the time count begins. When the time countreaches the set time, the state changes from “pre_master” to “master.”

In the BMC_slave state, the port receives and handles Sync packets anddelay-resp packets, sends delay-req packets, and recovers the clock andthe time according to the contents carried in the Sync packets, thedelay-resp packets, and the delay-req packets.

In the BMC_master state, the port sends the Sync packet and thedelay-resp packet which carry the selected best track source (Ebest) ofthe device, receives and processes the delay-req packet, and distributesthe announce packet.

The second embodiment of the present disclosure provides an apparatusfor tracking a clock source. As shown in FIG. 5, the apparatus includesa port sorting unit, a clock source selecting unit, and a transmittingunit.

The port sorting unit is configured to sort each port of the device as aslave candidate port or a master candidate port according to the clocknetwork planning (i.e., including the clock network topology planning ofthe transport network and the master and slave clock source planning).That is, the port sorting unit determines the slave candidate port ofthe slave candidate type and the master candidate port of the mastercandidate type in the device according to the network planning.

The port sorting unit may further include a first port sorting sub-unitwhich is configured to determine the port capable of receiving the clocksource information from the convergence-layer device as a slavecandidate port and determine the port capable of receiving the clocksource information from the access-layer device as a master candidateport according to the planning of the clock network topology of thetransport network. When the first port sorting sub-unit determines theport capable of receiving the clock source information from theconvergence-layer device as a slave candidate port according to theplanning of the clock network topology of the transport network, thefirst port sorting sub-unit determines the port capable of receiving themaster clock source or the slave clock source as a slave candidate portin the device according to the planning of the master and slave clocksources in the convergence-layer network. The detailed processing is thesame as that described in the first embodiment above, and therefore isnot described in detail here.

The port sorting unit may further include a second port sorting sub-unitwhich is configured to determine the port capable of receiving the clocksource information from the convergence-layer device as a mastercandidate port according to the planning of the clock network topologyof the transport network. The second port sorting sub-unit furtherdetermines the port capable of receiving the master clock source or theslave clock source as the master candidate port in the device accordingto the planning of the master and slave clock sources in the network.The detailed processing is the same as that described in the firstembodiment above, and therefore is not described in detail here.

The clock source selecting unit uses the BMC comparative sourceselection method to determine the best clock source (Erbest) sent fromeach slave candidate port determined by the port sorting unit accordingto the clock source information received by all slave candidate ports,runs the BMC comparative source selection algorithm according to thebest clock source (Erbest) of each slave candidate port, and determinesthe best clock source (Erbest) which has the best quality and theshortest path to the device to be the best track source (Ebest) of thedevice. The detailed processing is the same as that described in thefirst embodiment above, and there is not described in detail here.

The transmitting unit is configured to run the BMC port statedetermining algorithm according to the type of each port of the device,the local clock (D0) of the device, the best track source (Ebest) of thedevice, and the best clock source (Erbest) of each slave candidate port,to determine the current state of each port of the device, to run theBMC port state machine at each port according to the current state ofeach port and the event that triggers change of the state, and to sendthe selected best track source (Ebest) of the device through the port ofthe device when the port is in the BMC_master state. The detailedprocessing is the same as that described in the first embodiment above,and therefore is not described in detail here.

The second embodiment of the present disclosure may, alternatively, notinclude the port sorting unit. In this case, the port type informationof the network device needs to be configured in the second embodiment ofthe present disclosure.

The second embodiment of the present disclosure may be integrated in thenetwork device.

Through implementation of the foregoing embodiments, the clockoscillation is improved, and the convergence speed of the clock sourceselection is increased. Such effects are described below, taking thetransport network in FIG. 2 as an example.

According to the network planning requirements, in the clock networkingarchitecture of the transport network shown in FIG. 2, theconvergence-layer device never tracks the clock sent by the access-layerdevice. In this case, the convergence-layer device BC-1 needs only totrack the clock sent by port 1 and port 2. Therefore, in thisembodiment, the four ports of the convergence-layer device BC-1 areconfigured according to Table 2.

TABLE 2 Slave candidate port Master candidate port Port 1 Port 1 Port 2Port 2 Port 3 Port 4

Afterward, the best clock source of the device BC-1 is selected in lightof the packet received by the slave candidate port. The switchover ofthe clock source is as follows:

First, the device BC-1 tracks the clock source of port 2 and then tracksthe clock source of port 1.

Therefore, after the foregoing embodiment is applied, the clock sourceswitches over only one time. The clock oscillation is reduced, and theconvergence speed of the clock source selection is increased.

The implementation of the foregoing embodiment is consistent with theclock network planning. Such an effect is described below, taking theclock networking architecture of the transport network in FIG. 3 andFIG. 6 as examples.

For the clock networking architecture of the transport network shown inFIG. 3, the convergence-layer device never tracks the clock sent by theaccess-layer device according to the network planning requirements. Inthis case, the convergence-layer device BC-1 needs only to track theclock from port 1 and port 2. In this embodiment, therefore, port 1 andport 2 are configured as slave candidate ports, and port 2, port 3, andport 4 are configured as master candidate ports, as shown in Table 3:

TABLE 3 Slave candidate port Master candidate port Port 1 Port 2 Port 2Port 3 Port 4

In this way, the device selects the clock source in light of only thepackets sent by port 1 and port 2 (see the curve with arrows in FIG. 7)instead of the packets sent by port 3 or by port 4. Therefore, theimplementation is consistent with the transport network planning.

Taking the clock networking architecture of the transport network inFIG. 6 as an example, the convergence-layer device never tracks theclock sent by the access-layer device according to the network planningrequirements. In this case, the convergence-layer device BC-1 needs onlyto track the clock sent by port 1 and port 3. In this embodiment,therefore, port 1 and port 3 are configured as slave candidate ports,and port 1, port 2, and port 3 are configured as master candidate ports,as shown in Table 4:

TABLE 4 Slave candidate port Master candidate port Port 1 Port 1 Port 3Port 2 Port 3

In this way, the device selects the clock source in based only on thepackets sent by port 1 and port 3, which is consistent with thetransport network planning.

As revealed in the technical solution above, the best clock source ofthe device is selected based on the packets received by the slavecandidate port. In this way, fewer ports are involved in the sourceselection calculation and fewer clock sources are involved in theselection. For example, if a device has ten boards where each board hasten ports, and where each port allows at most five candidate sources,500 clock sources are involved in the selection according to theprocessing method in the prior art. In contrast, if an embodiment underthe present disclosure is applied, a port of a board may be configuredas a slave candidate port, and a maximum of five clock sources areinvolved in the selection which reduces the computation load to 1/100.Therefore, the oscillation time is reduced in the clock source selectionprocess, and the convergence speed of the clock source is increased. Asa result, the bandwidth occupied by the distributed packets is reduced.

In the embodiments of the present disclosure, the slave candidate portinvolved in the source selection is determined according to the networkplanning. Therefore, the convergence-layer device is prevented fromtracking the clock source sent by the access-layer device. When themaster clock source fails, the convergence-layer device can track theslave clock source, and the clock planning requirements are strictlyobserved in the transport network that requires high controllability.

After reading the foregoing embodiments, those skilled in the art willappreciate that the present disclosure may be implemented throughhardware, or through software in addition to a necessary universalhardware platform. The technical solution under the present disclosuremay be embodied as a software product. The software product may bestored in a non-volatile storage medium (such as CD-ROM, USB flash disk,or mobile hard disk), and may include several instructions that enable acomputer device (such as personal computer, server, or network device)to perform the methods provided in the embodiments of the presentdisclosure.

Although the disclosure is described through some exemplary embodiments,the disclosure is not limited to such embodiments. It is apparent thatthose skilled in the art can make modifications and variations to thedisclosure without departing from the spirit and scope of thedisclosure. The disclosure is intended to cover the modifications andvariations provided that they fall in the scope of protection defined bythe following claims or their equivalents.

What is claimed is:
 1. A method for tracking a clock source, the methodcomprising: classifying each of ports of a device into a slave candidateport, a master candidate port, or a slave and master candidate port,wherein at least one of the ports of the device is only classified as amaster candidate port; for each port of the device, calculating aErbest, wherein the Erbest is a best clock source being tracked by theport of the device; calculating a Ebest of the device only according toErbests of the slave candidate ports and the slave and master candidateports; determining a best clock source of the device according the Ebestand a D0, wherein the D0 is the local clock of the device; for each portof the device, determining a current state of the port according to theD0, the Ebest, the Erbest of the port and the classification of theport; distributing the best clock source through a port which isdetermined as in a BMC_master state.
 2. The clock source tracking methodof claim 1, wherein the classifying each of ports of a device comprisesclassifying a port being capable of only receiving clock sourceinformation from any one device in an access-layer as the mastercandidate port according to planning of a clock network topology of atransport network.
 3. The clock source tracking method of claim 1,wherein a port only classified as slave candidate port cannot be in theBMC_master state.
 4. The clock source tracking method of claim 1,wherein a port only classified as master candidate port cannot be in theBMC_slave state.
 5. An apparatus for tracking a clock source, theapparatus comprising: a port sorting unit, configured to: classify eachof ports of a device into a slave candidate port, a master candidateport, or a slave and master candidate port, wherein at least one of theports of the device is only classified as a master candidate port; aclock source selecting unit, configured to: for each port of the device,calculate a Erbest, wherein the Erbest is a best clock source beingtracked by the port of the device; calculate a Ebest of the device onlyaccording to Erbests of the slave candidate ports and the slave andmaster candidate ports; determine a best clock source of the deviceaccording the Ebest and a D0, wherein the D0 is the local clock of thedevice; a transmitting unit, configured to: for each port of the device,determine a current state of the port according to the D0, the Ebest,the Erbest of the port and the classification of the port; distributethe best clock source through a port which is determined as in aBMC_master state.
 6. The clock source tracking apparatus of claim 5wherein the port sorting unit comprises: a first port sorting sub-unitconfigured to classify a port being capable of only receiving clocksource information from any one device in an access-layer as the mastercandidate port according to planning of a clock network topology of atransport network.
 7. The clock source tracking apparatus of claim 5,wherein a port only classified as slave candidate port cannot be in theBMC_master state.
 8. The clock source tracking apparatus of claim 5,wherein a port only classified as master candidate port cannot be in theBMC_slave state.